In this work, we propose a model that captures the dynamic characteristics of metal-insulator-semiconductor (MIS)-based non-volatile memory (NVM). The main focus of our study is to investigate the dependence of the barrier profile (and hence, the dominant transport mechanism) on the write speed and write voltage. We evaluate the results from our model with experimental data from literature. The model and its framework can provide useful insights into the design of MIS-based NVMs with optimized performance. © 2023 IEEE.