Low complexity and reconfigurability are two key requirements of channel filters in a software defined radio receiver. A new reconfigurable architecture based on frequency response masking (FRM) technique for the implementation of channel filters is proposed in this paper. Our architecture offers reconfigurability at filter and architecture levels, in addition to the inherent low complexity offered by the FRM technique. The proposed reconfigurable filter has been synthesized on 0.18-µm CMOS technology and implemented and tested on Virtex-II 2v3000ff 1152–4 field-programmable gate array. Synthesis results show that the proposed channel filter offers average area and power reductions of 53.6% and 57.6%, respectively, with average improvement in speed of 47.6% compared to other reconfigurable filters in literature. © 2008 IEEE