Department of Electrical Engineering

Indian Institute of Technology Palakkad&nbsp;(IIT Palakkad or IIT PKD) is a public autonomous&nbsp;engineering&nbsp;and&nbsp;research&nbsp;institute located in&nbsp;Palakkad,&nbsp;Kerala. It was&nbsp;one of the five new&nbsp;IITs&nbsp;proposed in the&nbsp;2014 Union budget of India. The campus was inaugurated on 3 August 2015. The institute has 94 faculty, 978 students, and 63 non-teaching staffs.

IT Palakkad currently offers four-year Bachelor of Technology (B.Tech) and two years MS programmes in 8 different engineering disciplines including&nbsp;Computer Science, Electrical, Mechanical, Civil among others.

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IIT Palakkad

This brief presents a new real-time photoplethysmogram (PPG) signal quality assessment system for significantly reducing an overall energy consumption and reducing frequent false alarms. The proposed algorithm is based on the hierarchical decision rules by combining with simple features, such as absolute amplitude, threshold crossing rate, and autocorrelation function features. The algorithm is validated on both MATLAB software and Arduino Due with 32-bit ARM core microcontroller by using the standard PPG datasets and our real-time PPG datasets. The algorithm achieved a sensitivity of 99.29\%, specificity of 95.31\% and accuracy of 97.76\% with 754 false positive segments and 182 false negative segments of a total of 16 068 unacceptable and 25 772 acceptable segments, respectively. The algorithm provides a promising false alarm reduction rate of 95.31\% on different kinds of artifacts and noise. The proposed quality-aware monitoring system can save transmission energy consumption from 3.43\% to 95.1\% for transmission of noisy 5-60 s PPG signal.

World University root node

IEEE transactions on circuits and systems II: express briefs

Real-time PPG signal quality assessment system for improving battery life and false alarms

In a three-stage cascaded modular solid state transformer (CMSST), unbalanced dc bus voltages at the output of cascaded multilevel rectifier is a common issue due to inevitable parameter mismatch in stage-2. To balance the dc bus voltages, either voltage balance control (VBC) in stage-1 or power balance control (PBC) in stage-2 is necessary. In this paper, an in-depth theoretical analysis to investigate the input power quality of the CMSST in the presence of voltage and PBC schemes is presented. The grid-side multilevel voltage of the CMSST is analyzed to highlight the limitation of using VBC in stage-1. It is then mathematically proven that the switching frequency based harmonics in the grid current are significantly reduced by using the PBC in stage-2. Simulation studies of a 3.3-kV, 50-kVA CMSST are carried out using the PLECS software to substantiate the proposed analysis. Experimental verifications are performed on a 750-VA single-phase CMSST laboratory prototype for a 20% parameter mismatch in stage-2. It is found that the grid current total harmonic distortion (THD) is reduced from 6.65% to 3.8% at 50% load by using PBC in stage-2. This paper provides guidelines for the designer to choose appropriate balance controllers for the CMSST. © 1986-2012 IEEE.

IEEE Transactions on Power Electronics

A Comprehensive Harmonic Analysis and Control Strategy for Improved Input Power Quality in a Cascaded Modular Solid State Transformer

There has been increasing interest in solid-state transformers (SSTs) as a future replacement for conventional distribution transformers as it is able to provide ancillary services in addition to step-up/step-down of voltages. In SSTs, a common topology used in the ac-dc stage is the cascaded H-bridge (CHB) multilevel converter. This paper proposes a novel dual-model predictive control method for the CHB multilevel converter with faster dynamic response, improved harmonic performance, and voltage balancing of the CHB cells. The primary model enables conventional control over source current and output voltages, whereas the secondary model is able to generate the reference source current through power modeling, which eliminates the need for a proportion-integral (PI) controller, thus resulting in faster dynamic response. A Luenberger-based observer is also implemented to estimate the dc load current in each CHB cell. The second-order harmonic notch filter and the CHB cell dc voltage balancing cost function aim at improving the performance of the source current and CHB cell dc voltages, respectively. The proposed control techniques are then validated under steady-state and transient conditions through simulation and experiment with a laboratory prototype. © 1972-2012 IEEE.

IEEE Transactions on Industry Applications

Improved Performance with Dual-Model Predictive Control for Cascaded H-Bridge Multilevel Converter

In this paper, a constant switching frequency predictive control method for a three-level flying capacitor active front end converter is presented for the first time. This predictive control scheme results in reduced switching frequency operation of the converter with reduced computation burden compared to conventional predictive control methods. For the predictive controller, the cost function is defined in terms of grid current error vector in synchronously rotating d-q frame and the condition for optimal converter voltage vector is derived. The optimal converter voltage vector is then synthesized using level shifted carrier based space vector modulation. Thus the proposed method overcomes the disadvantage of variable switching frequency in predictive based control methods. The controller ensures very low harmonic distortion of line currents with minimum computational requirement of the predictive controller. The performance of the proposed predictive controller is analysed using MATLAB/SIMULINK and the results are compared with that of a conventional PI based control. It can be observed that the proposed controller results in similar performance in terms of harmonic spectrum, better performance in response time and decoupled control compared to a classical PI based controller and can be readily used for grid connected power conversion applications and distributed generation systems.

IEEE Region 10 Annual International Conference, Proceedings/TENCON

Constant Switching Frequency Virtual Vector Based Predictive Control of a Three-Level Flying Capacitor Active Front End Converter

Fifth generation (5G) of mobile networks are expected to serve multiple heterogeneous use cases. These use cases are extremely diverse in terms of service requirements and bundling them in a single monolithic network is a challenge. Network slicing is identified as one of the main enablers of 5G systems, where multiple logical End-to-End (E2E) networks share the resources of a single physical network. Radio Resource Management (RRM) in a sliced network should be able to simultaneously fulfill the required services of slices, dynamically share the network and assure the independence of slices so that slices cannot affect each other negatively. In this paper, we study the existing mechanisms that provide similar features in legacy networks and demonstrate the contributions and shortcomings of such existing RRM mechanisms in a sliced network. Thereafter, we argue the need for a new entity that will complement the existing RRM mechanisms to be slice-aware. With the aid of system-level simulations, we compare different slicing schemes and illustrate the drawbacks of legacy networks in fulfilling the objectives of a fully sliced network. Moreover, we illustrate the capabilities of the slice-aware RRM in steering the network's Key Performance Indicators (KPIs). © 2019 IEEE.

IEEE Wireless Communications and Networking Conference, WCNC

Radio Resource Management in context of Network Slicing: What is Missing in Existing Mechanisms?

In this paper, we present a real-Time quality-Aware pulse waveform delineation and parameter extraction method for accurate and reliable measurements of pulse parameters from photoplethysmogram (PPG) signals. It consists of three major stages: The PPG signal quality assessment (PPG-SQA) using autocorrelation function (ACF) and number of threshold-crossings (NTC) features, the zero-frequency resonator (ZFR) based pulse onset and peak determination, and the pulse parameter extraction. The method is implemented on the Arduino Due with a 32-bit Atmel SAM3X8E ARM Cortex-M3 CPU, 512-kB flash memory, 96-kB SRAM, and 84-MHz clock speed. The method is evaluated on the recorded PPG signals and three standard PPG databases. The PPG-SQA algorithm achieves an average sensitivity (Se)=98.62%, specificity (Sp)=97.37%, and overall accuracy (OA)=98.09%. The algorithm achieves an average Se=99.88%, positive predictivity (Pp)=99.89, Se=99.82%, and Pp=99.95%, respectively with the delineation errors (mean ± standard deviation) of 8.45 ± 9.39 ms and 0.23 ± 1.33 ms for finding onsets and peaks, respectively. The statistical analysis demonstrates that the parameter measurement errors are minimum for most of the pulse cycles. Results show that our quality-Aware PPG analysis scheme can achieve a false alarm rate reduction (FARR) of 97.36% which outperforms the other existing SQA algorithms. It can lead to save transmission and processing energy from 8.33% to 95.63% and 8.33% to 59.77% for a duration from 5 to 60 s, respectively. The method has great potential for low-energy IoT and unsupervised health monitoring devices. © 2001-2012 IEEE.

IEEE Sensors Journal

Real-Time quality-Aware ppg waveform delineation and parameter extraction for effective unsupervised and iot health monitoring systems

In this article, we propose a new real-time quality-aware quality-control data compression framework for maximizing the battery life of Internet of Things (IoT) and Smartphone based health monitoring devices. The proposed framework is implemented on Arduino Due with a 32-bit Atmel SAM3X8E ARM Cortex-M3 processor and validated using four standard databases and real-time signals obtained by using our sensing hardware. The proposed framework achieves compression ratios between seven and 28 with energy saving between 83% and 92%. Results demonstrate that our framework provides a promising energy saving solution by discarding the noisy photoplethysmogram (PPG) signals and pulse-free signals before performing data compression and compressing the noise-free PPG signals efficiently with very small feature parameter error. © 2019 IEEE.

IEEE Sensors Letters

A New Quality-Aware Quality-Control Data Compression Framework for Power Reduction in IoT and Smartphone PPG Monitoring Devices

Three-stage solid state transformer (SST) consists of a multilevel AC-DC converter in stage-l followed by dual active bridge (DAB) isolated DC-DC converters in stage-2 and a three-phase inverter in stage-3. The output filters of stage-l are designed to filter both switching frequency based harmonics and second harmonic ripple generated due to single-phase power processing. As a result, the use of less reliable electrolytic capacitors in stage-l is inevitable. In this paper, a new control scheme is proposed for the SST to transfer the second harmonic ripple current from the output of stage-l to the output of stage-2 in each phase. When the three phases are connected at the output of stage-2, the second harmonic ripple currents which are phase shifted by \frac2 \pi3 radians add to zero. As a result, the capacitive filter requirement at the medium voltage DC (MVDC) bus is reduced, which is realized using reliable film capacitors. The operating principles along with detailed mathematical analysis and simulation results are presented. © 2019 The Korean Institute of Power Electronics (KIPE).

ICPE 2019 - ECCE Asia - 10th International Conference on Power Electronics - ECCE Asia

A New Control Scheme to Process Ripple Power Through Isolation Stage of the Three-stage Solid State Transformer

Dynamical systems with abrupt changes or several structures or interruptions to communications between subsystems can be effectively modelled by random jump linear systems. Random jump linear systems are a kind of stochastic hybrid systems, which consists of a set of linear systems, also called multiple modes, and the switching among them is governed by a random jump process. In particular, we consider that the underlying random jump process is time inhomogeneous. Roughly, a time inhomogeneous random jump process is one that has time varying transition probabilities (or rates) among its modes. It is a practical consideration, because, in general, the physical systems are time inhomogeneous across its different properties and transition probabilities (or rates) among its modes can also be viewed as a time inhomogeneous phenomenon.

On stability and control of random jump linear systems

This paper presents a radio frequency microelectromechanical system (RF MEMS) based low loss and high transmit-to-receive isolation single-pole-double-throw (SPDT) switch integrated with antenna at 60 GHz for transceiver modules. The device is fabricated on 635μ m alumina substrate using surface micromachining process. SPDT switch features a measured return loss of &gt; 15 dB, insertion loss of &lt; 2.47 dB and isolation of &gt; 24.6 dB over the frequency band of 55-65 GHz. Total area of the SPDT switch is 2.443 × 0.87 mm2. A conventional patch antenna designed at 60 GHz is incorporated at RF-output port of the SPDT switch. The integrated antenna shows a measured return loss of &gt; 25 dB, and 10 dB impedance bandwidth of 8.5% at 60 GHz, when it is connected with either of the input ports of the SPDT switch. Also, a simulated gain of 5.433 dB is observed at 60 GHz. The total area of the integrated device is small enough (8.29 mm2) to fit in 60 GHz T/R modules. Fabricated device is also presented in the paper. © 2018 IEEE.