Department of Electrical Engineering

Indian Institute of Technology Palakkad&nbsp;(IIT Palakkad or IIT PKD) is a public autonomous&nbsp;engineering&nbsp;and&nbsp;research&nbsp;institute located in&nbsp;Palakkad,&nbsp;Kerala. It was&nbsp;one of the five new&nbsp;IITs&nbsp;proposed in the&nbsp;2014 Union budget of India. The campus was inaugurated on 3 August 2015. The institute has 94 faculty, 978 students, and 63 non-teaching staffs.

IT Palakkad currently offers four-year Bachelor of Technology (B.Tech) and two years MS programmes in 8 different engineering disciplines including&nbsp;Computer Science, Electrical, Mechanical, Civil among others.

&nbsp;

IIT Palakkad

In this letter, a novel objective distortion measure is proposed for compressed electrocardiogram (ECG) signals. The measure is a weighted percentage root-mean-square difference (WPRD) between the subband coefficients of the original and compressed signals with weights equal to the multiscale entropies of the corresponding subbands. The measure appears to be a correct representation of the amount of signal distortion at all the subbands. Experiments show that the measure works better than the other existing measures and correlates well with the subjective assessments. © 2008 IEEE.

World University root node

IEEE Signal Processing Letters

Multiscale entropy-based weighted distortion measure for ECG coding

Finite impulse response (FIR) filtering is the most computationally intensive operation in the channelizer of a wireless communication receiver. Higher order FIR channel filters are needed in the channelizer to meet the stringent adjacent channel attenuation specifications of wireless communications standards. The computational cost of FIR filters is dominated by the complexity of the coefficient multipliers. Even though many methods for reducing the complexity of filter multipliers have been proposed in literature, these works focused on lower order filters. This paper presents a coefficient-partitioning- based binary subexpression elimination method for realizing low power FIR filters. We show that the FIR filters implemented using proposed method consume less power and achieve speed improvement compared to existing filter implementations. Design examples of the channel filters employed in the Digital Advanced Mobile Phone System (D-AMPS) and Personal Digital Cellular (PDC) receivers show that the proposed method achieved 23% average reductions of full adder and power consumption and 23.3% reduction of delay over the best existing method. Synthesis results show that the proposed method offers average area reduction of 8% and power reduction of 22% over the best known method in literature. Copyright © 2008 The Institute of Electronics, Information and Communication Engineers.

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Realization of low power high-speed channel filters with stringent adjacent channel attenuation specifications for wireless communication receivers

Low complexity and reconfigurability are two key requirements of channel filters in a software defined radio receiver. A new reconfigurable architecture based on frequency response masking (FRM) technique for the implementation of channel filters is proposed in this paper. Our architecture offers reconfigurability at filter and architecture levels, in addition to the inherent low complexity offered by the FRM technique. The proposed reconfigurable filter has been synthesized on 0.18-µm CMOS technology and implemented and tested on Virtex-II 2v3000ff 1152–4 field-programmable gate array. Synthesis results show that the proposed channel filter offers average area and power reductions of 53.6% and 57.6%, respectively, with average improvement in speed of 47.6% compared to other reconfigurable filters in literature. © 2008 IEEE

IEEE Transactions on Circuits and Systems II: Express Briefs

Reconfigurable Frequency Response Masking Filters for Software Radio Channelization

The complexity of linear-phase finite-impulseresponse (FIR) filters is dominated by the complexity of coefficient multipliers. The number of adders (subtractors) used to implement the multipliers determines the complexity of the FIR filters. It is well known that common subexpression elimination (CSE) methods based on canonical signed digit (CSD) coefficients reduce the number of adders required in the multipliers of FIR filters. A new CSE algorithm using binary representation of coefficients for the implementation of higher order FIR filters with a fewer number of adders than CSD-based CSE methods is presented in this paper. We show that the CSE method is more efficient in reducing the number of adders needed to realize the multipliers when the filter coefficients are represented in the binary form. Our observation is that the number of unpaired bits (bits that do not form CSs) is considerably few for binary coefficients compared to CSD coefficients, particularly for higher order FIR filters. As a result, the proposed binary-coefficientbased CSE method offers good reduction in the number of adders in realizing higher order filters. The reduction of adders is achieved without much increase in critical path length of filter coefficient multipliers. Design examples of FIR filters show that our method offers an average adder reduction of 18% over the best known CSE method, without any increase in the logic depth. © 2008 IEEE.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

A new common subexpression elimination algorithm for realizing low-complexity higher order digital filters

The primary task in any cognitive radio (CR) network is to dynamically sense the radio spectrum so as to reliably determine portion(s) of the frequency band that may be used for communication link(s). Recently spectrum sensing for CRs based on filter banks have been addressed in literature. It was suggested that using filter banks for spectrum sensing would offer new opportunities of communicating at no extra cost. This means the reuse of sensing filter banks for transmission purpose also. But there was no consideration on the complexity issues associated with filter banks for CR. In this paper, we present a new low complexity reconfigurable filter bank architecture for multi-standard CR. The proposed filter bank is compared with other approaches and comparison results show that the proposed architecture is ideally suited for the CR systems.

Proceedings of the 3rd International Conference on Cognitive Radio Oriented Wireless Networks and Communications, CrownCom 2008

A low complexity reconfigurable filter bank architecture for spectrum sensing in cognitive radios

Electronics Letters

Effective quality-controlled SPIHT-based ECG coding strategy under noise environments

The most computationally demanding part in the digital front-end of a Software radio receiver is the channelizer, which operates at the highest sampling rate. The channelizer extracts multiple narrowband channels from the digitized wideband input signal. The limitation of the conventional uniform Discrete Fourier transform (DFT) filter bank channelizer is that, it is incapable of extracting channels of multiple bandwidths, as the prototype filter has fixed equal bandwidths. Reconfigurable filter bank architecture for the SDR channelizer, based on multi-stage frequency response masking technique is proposed in this paper. The proposed architecture is capable of extracting channels with different bandwidths corresponding to different wireless communication standards. Design examples show that proposed architecture offers a complexity reduction of 97.2 % over the conventional Per-Channel (PC) approach and DFT filter banks. ©2008 IEEE.

Proceedings - IEEE International Symposium on Circuits and Systems

A reconfigurable multi-stage frequency response masking filter bank architecture for software defined radio receivers

Noise degrades the rate-distortion performance of any electrocardiogram (ECG) compression algorithm. In distortion driven lossy coding approach, the bit stream is truncated at the bit rate that corresponds to a guaranteed user defined distortion level measured using the percentage root mean square difference (PRD). In many lossy compression methods, noise filtering may be implicitly done when performing the thresholding or/and quantization. In such a case, noise decreases the compression ratio for the specified distortion level. In this paper, we propose an effective wavelet-based lossy compression of noisy ECG signals based on the set partitioning in hierarchical trees (SPIHT) coding algorithm and novel wavelet energy based weighted PRDs (WEWPRD s) criterion. The PRDs measures normalized root mean squared difference between wavelet subband coefficients of the original and compressed signals. The dynamic weights based on wavelet energy feature represent the actual contribution of the subbands that are used to discriminate different frequency subbands, particularly subbands corresponding to noise. The WEWPRDs criterion appears to be a correct representation of the amount of signal distortion at all subbands and robust to insignificant errors in some bands. Thus, this criterion leads to a better measure of the rate-distortion (R-D) performance of the coder. Experiments on several noisy records from the widely used MIT-BIH arrhythmia (mita) database show that the proposed scheme outperforms PRD and wavelet based weighted PRD (WWPRD) measurement criteria based schemes.

TENCON 2008-2008 IEEE Region 10 Conference

An effective wavelet-based lossy compression of noisy ECG signals

A novel and simple quality controlled ECG compression algorithm is proposed using Wavelet energy based diagnostic distortion (WEDD) measure, which localizes the error between the original and the reconstructed signals in the feature space. The compression algorithm is based on Wavelet transform, energy based thresholding and an adaptive quantization scheme. The quality control criterion allows clinically acceptable reconstructions while maintaining high compression ratios. The advantage of the proposed algorithm is that the threshold value and the quantization bits are chosen automatically in few iterations so that the quality of the reconstructed signal is controlled. © 2007 IEEE.

International Conference on Computational Intelligence and Multimedia …

Quality controlled wavelet compression of ECG signals by WEDD

The most computationally demanding block in the digital front end (DFE) of a software defined radio (SDR) is the channelizer which operates at the highest sampling rate. Channelizers are employed in the SDR receivers for extracting individual channels from the digitized wideband input signal. Reconfigurability and low complexity are the two key requirements of channelizers in SDRs. A new reconfigurable filter bank (FB) architecture based on an interpolation and masking technique for SDR channelizers is proposed in this paper. The proposed FB offers reconfigurability at the architectural level and at the channel filter level, and is capable of extracting channels of different bandwidths corresponding to multiple wireless communication standards from the digitized wideband input signal. Design example shows that the proposed FB offers complexity reduction of 89.9% over the conventional per-channel (PC) approach, 79.8% over DFT filter banks (DFTFBs) ©2007 IEEE.